One of the continuing issues with the use of metal gate transistors is the ability to achieve the desired work function while not adversely impacting the gate dielectric. One of the issues in implementing higher K dielectrics for gate dielectrics is that there is some native oxide that forms that has the effect of reducing the overall dielectric constant of the gate dielectric. This oxide tends to increase in thickness with subsequent processing. A variety of metals and metal alloys have been proposed for use as the gate but no one material is optimum for both N and P channel transistors. The choice for one transistor type can make it difficult to achieve the desired work function for the other transistor type.
Thus, there is a need for a metal gate technique for one transistor type that improves on the combination of desires to be integratable with other transistor types, have minimal adverse impact on the gate dielectric, and achieve the desired work function.